Register to attend this P4 Developer Days webinar, “P4 on Silicom ThunderFjord SmartNIC”
Date: May 29, 2025
Time: 8:00am Pacific
Abstract
The integration of P4 into the FPGA of the Silicom ThunderFjord SmartNIC brings unprecedented flexibility and programmability to modern networking. This presentation explores the capabilities of the ThunderFjord SmartNIC, highlighting how P4 enables dynamic packet processing directly on the hardware. We will delve into the architecture of the SmartNIC, its role in enhancing network performance, and the benefits of using P4 to implement custom protocols, traffic management, and network offload functions.
Speakers
Lars Munch , Senior Software Engineer, Silicom Denmark
Lars holds a Master’s degree in Computer Science from the Technical University of Denmark (DTU), with research experience in embedded systems. With over two decades of expertise, he has developed high-performance software solutions for SmartNICs, IoT devices, and embedded Linux platforms. Currently, Lars is a Senior Software Engineer at Silicom Denmark, where he is responsible for the design, development, and optimization of software solutions related to SmartNICs, playing a key role in delivering advanced networking technologies.
Eleftherios Kyriakakis, FPGA Developer, Silicom Denmark
Elefherios holds a PhD from the Technical University of Denmark (DTU) with a research focus on “Time-predictable End-system Design for Real-Time Communication”. He specializes in FPGA and ASIC design, particularly in developing fault-tolerant and real-time systems. His most notable published works include the implementation of a fault-tolerant inter-chip Network-on-Chip (NoC) communication bridge on FPGAs, memory controllers with single-event upset (SEU) detection, and research on precise time protocol (PTP) and time-triggered networks. Currently, Eleftherios is working as an FPGA engineer at Silicom Denmark, where he is responsible for the design and development of proof-of-concept solutions for SmartNICs.